Chips and hardwareUpdated November 5

A leak shows Nova Lake-H's reported six-tile layout.

The raw, low-resolution image gives the leak a little more shape: Wccftech identifies a six-tile setup, while TechPowerUp describes a compute tile carrying 4 P-cores and 8 E-cores. A separate die is reported to hold 4 LPE-cores and serve as a central hub, so those low-power cores aren’t part of the 4+8 compute count. The report also describes a graphics tile with 4 Xe GPU cores. The package is about 12 × 23 mm, and total die area is reported at 276 mm². That’s a lot of silicon arranged as distinct pieces.

2 publishers2 reports

Coverage started November 5